COMPUTE 100 PUBLIC

Advantest makes automated test equipment (ATE) used to verify that semiconductor chips function correctly before they ship. Every chip that leaves a fab—whether a GPU, a memory module, or a networking chip—must pass through test systems that confirm its electrical performance meets specification. Advantest is one of the two dominant suppliers of this equipment globally, with particular strength in the high-speed memory and logic testing segments most relevant to AI hardware.

The growth of AI compute has made chip testing both more important and more technically demanding. HBM memory, stacked in multiple layers and operating at extremely high bandwidth, requires specialized equipment capable of validating the full stack. AI GPUs, built on the most advanced process nodes available, have more transistors, more interconnects, and more failure modes than any prior chip generation. Each increase in chip complexity expands the scope of what Advantest's equipment must do, and the volume of chips requiring that testing has grown alongside AI infrastructure investment.

In 2025, Advantest launched new test systems supporting HBM4 and next-generation logic qualification, ahead of the memory transition expected with Nvidia's Rubin GPU architecture. Revenue grew approximately 20% YoY, driven by AI chip production volumes at TSMC, SK Hynix, and Micron. Service contract volume has also expanded as fabs and OSATs running Advantest equipment operate at high utilization and require ongoing support.

AWS, Amazon's cloud division, is the largest cloud provider globally and the primary driver of Amazon's operating profits. Amazon has increasingly positioned AI as central to its cloud strategy, investing heavily in custom silicon, foundation models, and AI-powered services across its product portfolio.

Amazon AWS designs AI training chips (Trainium) and inference chips (Inferentia), deployed within its cloud infrastructure and accessed through Amazon Bedrock alongside third-party models. AWS also develops its own foundation models (Amazon Nova) and operates Bedrock as a managed AI platform aggregating models from multiple providers.

In March 2026, AWS announced a multi-year partnership with Cerebras Systems deploying a "disaggregated inference" architecture: Trainium handles the prefill stage while Cerebras' wafer-scale CS-3 chip handles token decoding, available through Amazon Bedrock. AWS is the first cloud provider to offer this architecture commercially.

AMD designs CPUs and GPU accelerators for data centers, PCs, and embedded applications. Its EPYC server CPUs compete with Intel Xeon in enterprise and cloud markets, while its Instinct GPU line targets AI training and inference in data centers. AMD operates as a fabless company, relying primarily on TSMC for manufacturing its most advanced chips.

The AI compute era has elevated AMD's data center GPU business from a secondary product line to a primary growth driver. Starting with the MI300X in late 2023—its first GPU competitive with Nvidia's H100 for large language model inference—AMD pursued an annual GPU release cadence and built out its ROCm open-source software stack as an alternative to Nvidia's CUDA ecosystem. The strategy attracted hyperscaler and enterprise customers seeking supply diversification. Microsoft and Meta deployed MI300X at scale, and AMD's data center segment reached approximately $16B in annual revenue in 2025.

In 2025, AMD launched the Instinct MI350 series and announced the MI400 and Helios rack-scale solution for 2026. Meta confirmed broad deployment of MI300X for Llama 3 and Llama 4 inference. AMD also signed a partnership with OpenAI for 6 GW of Instinct GPU deployments and a collaboration with HUMAIN in Saudi Arabia for 500 MW of AI compute capacity. The company launched ROCm 7 and the AMD Developer Cloud to reduce the software barrier for developers adopting its platform.

AMEC designs and manufactures etch and chemical vapor deposition (CVD) equipment for semiconductor fabrication. These are among the most critical steps in wafer production, required dozens of times across a chip's manufacturing process. AMEC is China's leading domestic supplier in these categories, competing globally with Lam Research and Applied Materials.

US export controls restricting the sale of advanced semiconductor equipment to Chinese fabs have structurally expanded AMEC's market. As domestic Chinese foundries and memory manufacturers build AI chip capacity, they have had to source etch and deposition tools locally. AMEC has benefited directly, with customers accelerating orders as they seek to develop AI chip manufacturing capability without dependence on foreign suppliers that may face further export restrictions.

AMEC has responded by expanding its product lines to address fabrication steps where it previously had limited presence, including more advanced etch processes used in logic and memory production. Revenue has grown as domestic Chinese fabs—including those producing chips for AI accelerator programs—have increased equipment procurement from domestic suppliers. The company's growth trajectory is directly tied to China's broader push for semiconductor self-sufficiency, a policy priority that has received substantial government support.

Amkor is one of the world's largest outsourced semiconductor assembly and test (OSAT) providers. After chips are fabricated at a foundry, they must be packaged—encased in a protective substrate, connected to external contacts, and tested before delivery. Amkor performs this across a range of packaging types, from standard flip chip to advanced 2.5D configurations that integrate multiple chips on a shared substrate.

AI chips have made advanced packaging a critical bottleneck in the semiconductor supply chain. Architectures like Nvidia Blackwell and AMD MI300 require 2.5D packaging that bonds high-bandwidth memory directly to the GPU die using a silicon interposer. TSMC performs much of this in-house through its CoWoS process, but CoWoS capacity has remained fully booked as AI chip demand has outpaced TSMC's ability to expand. This has created overflow demand for OSATs like Amkor, which offer alternative advanced packaging for customers and chip designs that cannot be served within TSMC's own lines.

Amkor is expanding its 2.5D packaging capacity and investing in process development to serve AI chip customers. Advanced packaging revenue grew approximately 15% YoY in 2025. The company's opportunity is tied to both the volume of AI chips being produced and the structural shift toward chiplet-based chip architectures, which require more sophisticated and higher-value packaging than monolithic designs. As AI accelerators continue integrating more chiplets and larger HBM stacks, the assembly complexity—and Amkor's value-add—grows with each generation.

Applied Materials is the world's largest semiconductor equipment company by revenue, supplying tools across nearly every major step in chip fabrication. Its product portfolio spans deposition, etch, ion implantation, rapid thermal processing, and metrology. Applied sells to every major foundry and memory manufacturer, and its equipment is present in virtually every advanced semiconductor fab operating today.

AI chip manufacturing at the leading edge has expanded Applied Materials' role in two ways. First, new chip architectures required for AI performance—including gate-all-around transistors at 2nm, backside power delivery networks, and advanced interconnects—require new deposition and etch capabilities where Applied has invested. Second, the advanced packaging used to assemble AI chips, particularly the CoWoS process bonding HBM memory to GPU dies, requires deposition and bonding equipment where Applied is increasingly engaged. As AI chip production has scaled, both the complexity and volume of Applied's addressable processes have grown.

In February 2025, Applied launched the SEMVision H20, a defect-review system using AI-based image recognition to identify and classify chip defects with greater speed and accuracy. Applied also advanced its Integrated Materials Solutions approach—co-optimizing multiple deposition and etch steps in a single system to reduce processing time and improve consistency. Revenue from advanced packaging tools and leading-edge logic equipment have been the primary AI-driven growth vectors.

Arista Networks designs high-performance Ethernet switches and the EOS network operating system that runs on them. Its switches are used in hyperscale data centers to move data between servers at high speed and low latency. Arista has long served the largest cloud operators—Meta, Microsoft, Google—with switching infrastructure for their general-purpose computing networks, a customer base that has become the core of the AI networking market.

The shift of large-scale AI training from proprietary networking fabrics to Ethernet has expanded Arista's opportunity substantially. GPU clusters require high-bandwidth, low-latency networks to coordinate parallel computation across thousands of accelerators. As hyperscalers have moved to build AI clusters on Ethernet rather than InfiniBand—driven by cost, vendor diversity, and ecosystem breadth—Arista has been a primary beneficiary. Its 800G switching platforms and AI Spine architecture are designed for the traffic patterns of distributed AI workloads.

Full-year 2025 revenue reached $9B, up 29% YoY, with AI networking a significant contributor. Arista launched the R4 series platform for AI cluster and data center deployment, and introduced CloudVision UNO, a network observability tool providing job-centric monitoring for AI training runs. The company deployed networking infrastructure for four major hyperscaler AI clusters.

Arm Holdings designs CPU instruction set architectures and processor IP cores, which it licenses to semiconductor companies that incorporate them into their own chips. Rather than manufacturing or selling chips directly, Arm earns royalties on every chip shipped using its architecture. The Arm architecture dominates mobile computing and has expanded significantly into servers, PCs, and automotive applications.

The AI infrastructure buildout has accelerated Arm's penetration of the data center CPU market. Cloud operators building AI infrastructure have invested in custom Arm-based processors as alternatives to x86: AWS Graviton4, Microsoft Cobalt, and Nvidia Grace are all Arm-based, deployed at large scale alongside GPU accelerators. The appeal is energy efficiency—Arm-based server CPUs deliver competitive performance per watt compared to Intel and AMD x86 designs, a consideration that grows significant when running AI infrastructure at scale.

On-device AI has extended Arm's addressable market further. Every major smartphone AI feature—on-device language models, real-time image processing, voice recognition—runs on Arm-based chips with dedicated neural processing units. The same is true for AI PCs using Snapdragon and Apple Silicon. Arm-based data center CPU shipments more than doubled in 2025, driving royalty revenue growth across the company's most valuable market segments. In early 2026, Arm notably launched their own CPU product, the Arm AGI CPU.

ASE Group is the world's largest outsourced semiconductor assembly and test (OSAT) company, providing the packaging and testing services that convert fabricated silicon wafers into finished chips. After a wafer leaves a foundry, each die must be separated, mounted on a substrate, connected to external contacts, and tested. ASE performs this across packaging types from standard wire-bond and flip chip to advanced 2.5D and 3D configurations that integrate multiple dies on a shared substrate.

AI chips have made advanced packaging one of the most constrained steps in the semiconductor supply chain. AI accelerators like Nvidia Blackwell and AMD MI300 require 2.5D packaging that bonds high-bandwidth memory directly to the compute die using a silicon interposer. TSMC performs much of this in-house through CoWoS, but CoWoS capacity has remained fully booked as AI chip demand has grown faster than TSMC's ability to expand. ASE has absorbed overflow from this constraint, taking packaging work for AI chip designs that cannot be served within TSMC's own facilities.

Q3 2025 revenue reached approximately $5B, up ~20% YoY. ASE is developing CoWoP as an alternative 2.5D packaging solution, giving customers an option outside TSMC's CoWoS process. As AI chip architectures continue integrating more chiplets—compute dies, memory stacks, networking tiles—the value and complexity of each packaging engagement grows.

ASML is the sole manufacturer of extreme ultraviolet (EUV) lithography machines, the equipment used to print the most advanced transistor patterns onto silicon wafers. Producing chips at 7nm and below—the nodes at which virtually all leading AI accelerators are manufactured—is not possible without EUV. ASML supplies its machines to TSMC, Samsung, and Intel. No other company in the world produces EUV lithography equipment.

Every AI chip manufactured at advanced nodes passes through ASML equipment. Nvidia's Blackwell, AMD's MI300, Google's TPU, and every custom ASIC built for AI inference run on silicon patterned by ASML's machines. As the AI infrastructure buildout has driven unprecedented investment in advanced semiconductor capacity, demand for ASML's equipment has grown accordingly. Foundries and memory manufacturers are placing multi-year orders to secure machine allocation.

In 2025, ASML's High-NA EUV machines—the next generation enabling finer pattern resolution—began ramping at customer sites for sub-2nm production. This system is required for the 2nm and 1.6nm nodes that TSMC and others are preparing for next-generation AI chips. ASML projects approximately $71B in revenue by 2030, underpinned by AI chip demand driving both volume growth in existing EUV systems and the transition to High-NA systems.

Astera Labs designs semiconductor connectivity solutions for AI servers and data centers, including PCIe and CXL retimers, smart cable modules, and fabric switches. These products manage data movement between the different components inside an AI server—between CPUs, GPUs, and memory—ensuring data arrives reliably at the speeds required for large-scale AI workloads. Astera went public in March 2024 and has grown rapidly since, driven by the expansion of hyperscaler AI infrastructure.

The architecture of AI servers has grown substantially more complex as workloads have scaled. A modern AI training server can contain eight or more GPUs, multiple CPUs, large memory pools, and high-speed networking—all exchanging data at extreme bandwidth. As signal distances increase and component count grows, the electrical signals traveling between them degrade. Astera's retimers and connectivity chips restore and condition these signals, enabling reliable communication at the speeds AI computation requires.

The CXL standard—which enables memory to be pooled and shared across multiple processors—is an area where Astera has invested early, positioning the company for the next phase of AI server architecture where memory disaggregation becomes more common. Revenue has grown at triple-digit rates as hyperscaler AI buildouts have accelerated, with multiple Tier-1 cloud operators adopting Astera's products.

Baidu is China's largest internet search company and one of its most significant AI platform operators. The company operates search, mapping, autonomous driving, and cloud services, and has been developing large language model capabilities for years. Baidu's AI platform spans consumer-facing applications, enterprise cloud services, and the custom silicon used to run AI inference at scale.

ERNIE Bot—China's most widely adopted AI assistant—surpassed 300M users by mid-2025, generating revenue through consumer subscriptions and enterprise API access. ERNIE 4.5 and ERNIE X1, a reasoning-focused model, launched in 2025. AI cloud services have grown double-digit YoY. Baidu also ships its own Kunlun AI inference chip, providing a domestically sourced alternative for inference workloads that would otherwise require Nvidia or AMD hardware.

Baidu's efficiency comes from vertical integration—from the model itself to the cloud infrastructure to the chip running that infrastructure. The Kunlun chip program reduces Baidu's dependence on imported silicon for its own AI operations, and the model and cloud businesses give Baidu direct participation in China's AI application market as both a builder and an infrastructure provider.

Broadcom is a semiconductor and infrastructure software company with two distinct roles in the AI supply chain. The first is custom AI silicon: Broadcom co-designs application-specific integrated circuits with cloud hyperscalers who want AI accelerators optimized for their specific workloads rather than general-purpose GPUs. Google's Tensor Processing Units are the most prominent example, designed in partnership with Broadcom. The second role is AI networking: Broadcom's Tomahawk Ethernet switches and Jericho routers connect the thousands of GPUs in large AI clusters.

The economics of AI compute at hyperscale have driven growing demand for both product lines. Custom ASICs can be more efficient than general-purpose GPUs for specific inference workloads, and hyperscalers willing to invest in chip design have used Broadcom's manufacturing expertise to build them. At the same time, Ethernet-based AI networking has expanded as hyperscalers have moved away from InfiniBand for large cluster deployments, increasing demand for Broadcom's switching and routing products.

AI revenue jumped 106% year-over-year to $8.4 billion in Q1 FY2026, driven by robust demand for both custom AI accelerators and AI networking. The custom silicon pipeline has expanded well beyond Google: CEO Hock Tan confirmed Meta's MTIA accelerator program is active and targeting multiple gigawatts of capacity, OpenAI is deploying its first-generation custom chip at scale in 2027, and Google is targeting over three gigawatts of TPU capacity for Anthropic in 2027 alone.

Cadence Design Systems makes electronic design automation (EDA) software and semiconductor IP used by chip designers to develop, simulate, verify, and physically implement integrated circuits. Designing a modern chip is not possible without EDA tools—the complexity of placing billions of transistors, routing millions of connections, and verifying that a design functions correctly requires software that handles tasks no human could perform manually. Cadence and Synopsys are the two dominant EDA vendors globally.

AI chip design has expanded the scope and complexity of what EDA tools must handle. Modern AI accelerators are often multi-die systems—chiplets manufactured separately and integrated on a shared substrate. Designing these requires tools that can simulate the full package and verify electrical and thermal behavior across die boundaries. Cadence's 3DIC Compiler addresses this, and its adoption has grown as more chip companies move to chiplet-based AI architectures. At the same time, hyperscalers building custom AI ASICs have become significant Cadence customers.

Cadence generates over 70% of revenue from multi-year time-based license contracts, providing high revenue visibility. Revenue has grown 10–15% annually, and the company has launched AI-assisted features within its design tools that help engineers navigate increased complexity at leading-edge nodes. As AI chip architectures grow more complex—more chiplets, more packaging layers, more heterogeneous integration—the design task that Cadence's tools must support grows with it.

Cambricon Technologies is a Chinese fabless semiconductor company that designs AI accelerator chips for training and inference workloads. Founded in 2016, the company was among the earliest dedicated AI chip developers globally and has focused on building an integrated chip and software stack competitive with foreign alternatives within the Chinese market. Its products target data center AI deployments and are sold to enterprises, cloud providers, and government customers in China.

US export controls have structurally expanded Cambricon's addressable market. Restrictions on Nvidia's most advanced AI chips—the A100, H100, and their successors—have left Chinese AI developers without access to leading-edge GPU hardware. This has redirected procurement toward domestic alternatives, of which Cambricon is one of the most technically advanced. The company has invested in both hardware performance and software tooling to reduce the friction of deploying workloads on its platform.

Cambricon launched the MLU590 AI accelerator in 2025, targeting training and inference for large language models. Revenue grew through contracts with government agencies and state-owned enterprises accelerating domestic AI compute deployments. The company operates within a competitive domestic landscape that includes Huawei, Moore Threads, and Biren, but its early investment in both hardware and software tooling has given it an established position among Chinese AI developers.

Cerebras was founded in 2016 by Andrew Feldman and a team of former SeaMicro colleagues — the server startup they built and sold to AMD in 2012 for $334 million. The company is based in Sunnyvale, CA and builds AI chips using a wafer-scale approach: using an entire silicon wafer as a single processor, producing a chip with 900,000 AI-optimized cores and 44GB of on-chip SRAM. This architecture eliminates the data movement bottlenecks that constrain conventional GPU clusters and makes it particularly well-suited for low-latency AI inference at scale.

Cerebras sells both hardware systems (the CS-3) and cloud-based inference capacity. In 2025 the company generated $510M in revenue — up 76% year-over-year — with a 47% net margin ($238M net income), making it one of the few profitable AI hardware companies at IPO. A $24.6B revenue backlog at year-end underpins near-term growth visibility, anchored by a $20B+ multi-year agreement with OpenAI for 750 megawatts of low-latency inference capacity through 2028, co-designed with future Cerebras hardware.

AWS announced a partnership deploying a disaggregated inference architecture: Trainium handles prefill while Cerebras' CS-3 handles token decoding, available through Amazon Bedrock — the first time this architecture has been offered commercially. Cerebras IPO'd on Nasdaq under the ticker CBRS in May 2026, pricing at $150–$160/share at a ~$34B valuation, 20x oversubscribed.

Coherent designs and manufactures optical components, subsystems, and transceivers used across telecommunications networks, data centers, and industrial applications. In the context of AI infrastructure, its most relevant products are datacom transceivers—the optical modules that convert electrical signals to light and back, enabling high-bandwidth communication between servers over fiber optic cables. These transceivers form the interconnect fabric inside and between GPU racks in large AI clusters.

AI compute has driven a significant increase in bandwidth requirements for data center optical networking. A large AI training cluster connects thousands of GPUs that must exchange data continuously during training runs, and the network connecting them must operate at hundreds of gigabits per second per link. The industry has transitioned from 400G to 800G transceivers and is developing 1.6T products, with each generation requiring more sophisticated optical components.

In 2025, Coherent launched new EML and DFB laser products targeting 800G and 1.6T transceiver applications. The company has been contracted as a component supplier for hyperscaler AI networking expansion programs. Revenue growth has been driven by both the volume of new AI cluster deployments and the generational upgrade cycle within existing clusters, as operators replace 400G infrastructure with higher-speed products to accommodate growing AI workload bandwidth demands. In 2026, Coherent received $2B in investment from NVIDIA. Coherent delivered Q2 FY2026 revenue of $1.69 billion, up 17% year-over-year, driven by strong data center and communications demand.

CoreWeave is a cloud infrastructure company that operates GPU clusters accessible to AI developers, enterprises, and AI labs on a contracted basis. Unlike general-purpose cloud providers that offer GPU access as one of many services, CoreWeave is purpose-built around GPU compute, offering large-scale, dedicated GPU infrastructure for AI training and inference workloads. The company was founded in 2017 as a cryptocurrency mining operation and pivoted to GPU cloud services in 2019.

The economics of frontier AI model development have created strong demand for dedicated GPU cloud capacity. Training large language models requires sustained access to thousands of GPUs for weeks or months, often under contracts that guarantee availability rather than the on-demand pricing common in general cloud services. CoreWeave's model—long-term contracts for dedicated GPU capacity—aligns with how serious AI developers procure compute. Its customer base includes OpenAI, Microsoft, and Meta, and its revenue backlog of $25.9B reflects the multi-year committed spending typical of its contracts.

CoreWeave IPO'd in March 2025, raising $1.5B, and reported revenue of $982M in Q1 2025, up 420% YoY. The company signed an $11.9B multi-year contract with OpenAI and a $14.2B contract with Meta, anchoring its backlog. Full-year 2025 revenue is guided to $5.05–5.15B. CoreWeave is expanding data center capacity across the US and internationally to convert its contracted backlog into delivered revenue.

Corning is a materials science company with major product lines including display glass, pharmaceutical packaging, and optical fiber and connectivity products. Corning is the world's largest manufacturer of optical fiber, the medium through which data travels as light across long distances and within data center campuses. As data centers have scaled in size and the distances between buildings and facilities have grown, optical fiber has become a fundamental infrastructure material.

AI data center campuses are physically larger and more bandwidth-intensive than conventional facilities. A hyperscaler building a large AI training campus may occupy multiple buildings connected by fiber networks carrying petabits per second of aggregate data. Inside facilities, the density of optical connections between racks has grown as switch speeds have increased. This combination—more buildings, more racks, more connections per rack—has driven higher volumes of optical fiber procurement.

Corning launched new high-density fiber solutions tailored to AI campus architecture in 2025, optimizing for rapid installation in large-scale builds. Data center has become one of Corning's highest-growth end markets, with revenue exceeding $1B annually and growing double-digit YoY. The company benefits from both the volume growth in fiber demand and its position as the leading supplier, with manufacturing scale and fiber process expertise that is difficult to replicate.

Credo Semiconductor designs high-speed connectivity chips and active electrical cables (AECs) for data center networking, focused on the short-reach, high-bandwidth connections within and between server racks in AI GPU clusters. Its HiWire AEC products—cables with embedded Credo chips at each end—provide 112G and 224G connectivity between servers over copper, at lower power and lower cost than optical transceivers used for longer distances.

AI GPU clusters have created a large and fast-growing market for Credo's products. A cluster of thousands of GPUs requires tens of thousands of individual high-speed links connecting each GPU to the switching fabric. The cost, power, and cable management requirements of those connections at scale are significant, and Credo's AEC approach—compact, power-efficient, and manageable without the complexity of optical fiber at short range—has been adopted by hyperscalers building large AI clusters.

Credo has continued to massively outperform expectations through FY2026. TTM revenue through January 31, 2026 reached $1.07 billion, up 226% year-over-year. Beyond its core AEC business, Credo has been expanding its product portfolio: the company debuted ZeroFlap optical transceivers, 800G and 1.6T optical DSPs, and its Robin DSP family at the 2026 Optical Fiber Communication Conference, signaling a broadening from copper-based AEC into optical connectivity as AI networking architectures continue scaling to higher per-link bandwidths.

Dell Technologies is an integrated technology company selling servers, storage, PCs, and services to enterprises worldwide. Its Infrastructure Solutions Group, which includes servers and networking hardware, has become the primary growth engine of the business as enterprise and cloud demand for AI-capable compute infrastructure has increased. Dell functions as a system integrator and distribution channel for AI infrastructure, assembling Nvidia GPU-based servers and selling them to enterprises, cloud providers, and sovereign AI programs.

Dell's position as a trusted enterprise technology vendor gives it access to a large customer base adopting AI infrastructure for the first time. Many enterprises do not have the procurement relationships or technical staff required to build GPU clusters from components; Dell provides a turnkey path, offering pre-integrated AI servers, storage, and services under its AI Factory brand.

Dell delivered record full-year FY2026 revenue of $113.5 billion, up 19% year-over-year, with Q4 revenue of $33.4 billion, up 39% YoY. The Infrastructure Solutions Group posted full-year revenue of $60.8 billion, up 40% YoY, with Q4 AI-optimized server revenue alone hitting $9 billion, up 342% year-over-year. Dell closed more than $64 billion in AI-optimized server orders during the year, shipped more than $25 billion, and entered FY2027 with a record backlog of $43 billion.

Equinix operates the world's largest network of colocation data centers, providing physical space, power, and connectivity for the IT infrastructure of enterprises, cloud providers, and network operators. Its defining asset is Platform Equinix—a globally interconnected network of facilities where customers co-locate servers and connect directly to cloud providers, internet exchanges, and each other over private cross-connects.

AI has shifted the requirements of data center colocation in ways that favor Equinix's positioning. Enterprises building AI applications need infrastructure close to their existing data and low-latency access to the cloud services running foundation models. Equinix facilities—at the intersection of enterprise colocation and cloud connectivity—are natural locations for AI inference infrastructure. The power density requirements of AI GPU hardware have also created demand for premium colocation space capable of supporting high-wattage racks.

Equinix launched AI Infrastructure by Equinix (AIE) in 2025, offering managed GPU clusters as a colocation service. The company announced a joint venture exceeding $15B to develop AI-optimized data centers. Annual revenue reached approximately $9.2B in FY2026, with record leasing activity driven by hyperscaler and enterprise AI capacity demand.

Foxconn, formally known as Hon Hai Precision Industry, is the world's largest electronics contract manufacturer. It assembles products for Apple, Microsoft, Sony, and many others, and operates manufacturing facilities across Asia and increasingly the Americas. In the AI context, Foxconn's role is as an original design manufacturer and system integrator—it assembles AI servers from components (GPUs, CPUs, memory, networking cards) into rack-level systems and ships them to cloud providers and enterprises.

AI servers are among the most valuable and technically complex products Foxconn assembles. An NVL72 Blackwell rack system requires precise integration of 72 GPUs, liquid cooling infrastructure, high-speed networking, and power delivery hardware into a single unit. Foxconn has been contracted as a preferred assembler for these systems at scale. AI server assembly revenue grew approximately 150% YoY in 2025, making AI infrastructure one of Foxconn's largest and fastest-growing product categories.

Foxconn opened new AI-focused assembly facilities in Arizona in 2025 as part of expanding US-based AI manufacturing. The company has also invested in its own AI server design capabilities—moving from pure contract assembly toward ODM products with more Foxconn-designed components—and has developed an AI data center business selling complete facility solutions.

GlobalFoundries is a semiconductor foundry that manufactures chips for customers across automotive, aerospace, communications, and consumer electronics markets. Unlike TSMC and Samsung, which pursue the most advanced process nodes for leading-edge logic chips, GlobalFoundries operates specialty processes—manufacturing nodes used in chips where performance density is less critical than cost, reliability, or specific functional requirements. This positioning serves markets needing analog, RF, and mixed-signal capabilities not available in pure digital leading-edge foundries.

The AI supply chain extends beyond the GPU and HBM at its center. Power management chips, RF transceivers, silicon photonics components, and automotive AI processors all require the specialty processes GlobalFoundries offers. Edge AI inference—running AI models on devices rather than in the cloud—is a growing market that often requires chips manufactured on nodes where GlobalFoundries operates, given the power and cost constraints of edge devices.

GlobalFoundries secured CHIPS Act funding agreements for US fab expansion in Malta, New York. It signed multi-year supply agreements with AI edge customers, including automotive OEMs adding AI compute to ADAS systems. The company's strategy positions it as the foundry for portions of the AI hardware ecosystem that don't run through TSMC—the sensors, power ICs, networking chips, and edge compute that support AI applications in vehicles, factories, and connected devices.

Google develops and operates AI infrastructure across its own products, its cloud platform, and its custom silicon program. The company has been designing Tensor Processing Units (TPUs) since 2016—custom AI chips optimized for the matrix multiplication operations at the core of neural network computation—and has used them internally to run AI workloads at efficiency levels not achievable with general-purpose GPUs. TPUs are co-designed with Broadcom and manufactured at TSMC.

Google Cloud has become a primary commercial AI platform, offering TPUs, third-party GPUs, and AI development services to enterprises and AI labs. The commercial AI market has driven Google Cloud revenue growth as companies integrate AI into their workflows using Google's Gemini models and development tools. Google's DeepMind research division continues developing frontier models, including Gemini 2.0, deployed commercially through Google products and APIs.

Google's TPU program has continued to advance rapidly. Google's seventh-generation TPU, Ironwood, debuted as the company's first TPU designed for the age of inference, delivering ten times the peak performance of the TPU v5p and scaling to 9,216 liquid-cooled chips in a superpod producing 42.5 FP8 exaflops. On the supply chain side, Google has moved toward a multi-vendor architecture: Broadcom recently locked in a through-2031 TPU agreement, and Marvell has emerged as a potential third design partner. Google is in talks with Marvell to develop two new chips — a memory processing unit to work alongside existing TPUs, and a new inference-optimized TPU.

Infineon Technologies is a German semiconductor company specializing in power semiconductors, microcontrollers, and sensors for automotive, industrial, and computing applications. Its power semiconductor products manage the conversion and distribution of electrical power in electronic systems. In the data center context, Infineon's components are used in the voltage regulators, power modules, and power supply units that deliver stable power to processors, GPUs, and memory at the precise voltages and currents those chips require.

AI GPU servers have significantly raised data center power requirements, expanding the demand for power management components. A conventional server might consume 300–500 watts; an AI GPU server can consume 3,000–10,000 watts, and a full rack of NVL72 Blackwell systems may approach 1 megawatt. At these levels, the power conversion and delivery hardware must be more sophisticated, more efficient, and capable of handling higher currents. This has expanded the value and complexity of power semiconductor content in each server.

Infineon launched new silicon carbide (SiC) and gallium nitride (GaN) power products for high-density server rack applications in 2025, targeting the power conversion stages required by AI GPU systems. The company has established AI data center power as a dedicated market vertical within its business, recognizing that AI infrastructure requirements differ enough from conventional servers to warrant targeted product development. Revenue from data center power products grew double-digit YoY as AI server deployments expanded.

Intel designs and manufactures CPUs, GPUs, and AI accelerators for data centers and client devices, and operates semiconductor foundry services through Intel Foundry. Its Xeon server CPUs have long dominated data center general-purpose compute, and the company has invested in expanding into GPU and dedicated AI accelerator products. Intel is one of the few semiconductor companies that both designs its own products and manufactures them in its own fabs.

Intel's AI product strategy addresses two markets. In data centers, the Gaudi 3 AI accelerator targets training and inference workloads as an alternative to Nvidia's GPU line. In client computing, Intel's Core Ultra processors include integrated neural processing units (NPUs) for AI PC applications, where on-device AI workloads run without cloud connectivity. The AI PC market represents a significant upgrade cycle given Intel's large share of the existing PC installed base.

Intel's most significant recent development is its role in the Terafab project. On April 7, 2026, Intel announced it has signed on as the primary foundry partner for Elon Musk's Terafab — a $25 billion semiconductor joint venture between Tesla, SpaceX, and xAI targeting 1 terawatt of AI compute per year at a facility on the Giga Texas campus in Austin. Intel also announced a separate move to repurchase Apollo Global Management's 49% stake in Fab 34 in Leixlip, Ireland for $14.2B.

Kioxia is a Japanese NAND flash memory manufacturer, formerly the Toshiba Memory division, and one of the largest flash storage companies in the world. NAND flash is the underlying technology in solid-state drives used for storage in data centers, laptops, and mobile devices. Kioxia IPO'd on the Tokyo Stock Exchange in October 2024.

AI data centers require substantial NAND storage for training datasets and model checkpoints. Training large language models involves reading enormous volumes of data from storage repeatedly throughout a training run. Model weights and optimizer states must be checkpointed regularly to guard against hardware failures during runs that may last weeks. These workloads require large storage capacity and high sequential read throughput, and the scale of modern AI training clusters has made storage procurement a significant line item in AI infrastructure buildouts.

Kioxia has been shipping QLC (quad-level cell) NAND products optimized for the sequential read-heavy access patterns of AI training storage, where the cost-per-gigabyte efficiency of QLC is advantageous. The company is expanding manufacturing capacity to serve hyperscaler AI storage procurement and is developing next-generation ULC products for future AI storage applications. Revenue is growing as hyperscalers increase storage provisioning alongside GPU cluster expansion.

KLA Corporation makes process control, yield management, and inspection systems for semiconductor manufacturing. Its products—wafer defect inspection tools, pattern overlay measurement systems, and process control software—are used at every major step in chip fabrication to identify defects, measure alignment, and ensure the chip being built matches design intent. Every major foundry and memory manufacturer runs KLA equipment throughout production lines.

Manufacturing AI chips at 3nm and below makes process control more important and more technically demanding than at any prior node. Transistor geometries are now so small that minor process variations cause defects that would not exist at larger nodes, and the number of process steps required to build a leading-edge chip has grown substantially. The advanced packaging used to assemble AI chips—connecting multiple dies and HBM stacks on an interposer—adds further process control requirements at the assembly stage.

KLA's non-China revenue grew approximately 40% YoY in 2025, driven by capital expenditure increases at TSMC, Samsung, SK Hynix, and Micron as those companies expanded AI chip and HBM production capacity. KLA launched new inspection tools with AI-based defect classification, improving the speed and accuracy of defect detection on complex multi-layer chip structures. Process control spending typically scales proportionally with overall fab capital expenditure, giving KLA a predictable share of the AI chip manufacturing investment.

Lam Research designs and manufactures plasma etch and deposition equipment, two of the most critical and repeated process steps in semiconductor fabrication. Etch tools selectively remove material to define features; deposition tools add material to build up the layers that form transistors, interconnects, and memory cells. Virtually every chip manufactured today passes through Lam Research equipment multiple times during production.

The AI-driven surge in HBM memory production has been a significant driver of Lam's growth. HBM uses 3D stacking technology that requires extremely precise and repeated etch and deposition steps to build each memory layer, and Lam's equipment is used extensively in this process. SK Hynix, Micron, and Samsung—the three HBM manufacturers—have all increased capital equipment spending substantially to expand HBM production capacity. Advanced logic chips for AI GPUs also require Lam equipment at multiple steps, including the complex multi-patterning processes used to define transistors at 3nm.

Lam's non-China revenue grew approximately 40% YoY in 2025, driven by record orders from TSMC, SK Hynix, and Micron for AI chip and memory capacity expansion. The company has invested in advanced etch and atomic layer deposition capabilities required for next-generation AI chip manufacturing, including processes needed for gate-all-around transistors at 2nm and increasingly complex memory cell structures in next-generation HBM.

Lumentum makes optical and photonic products used across telecommunications networks and data center interconnects. Its core products include lasers, optical amplifiers, and switching components—the technology enabling data to travel as light through fiber optic infrastructure. In the data center context, its most relevant products are the laser components inside high-speed optical transceivers: the EMLs and DFB lasers that convert electrical data signals into light for transmission over fiber cables connecting servers and switches.

AI GPU clusters require high-bandwidth optical links between racks and switches to move data at the speeds needed for coordinated AI computation. The standard link speed in AI networking has been transitioning from 400G to 800G, with 1.6T under development, and each generational increase requires optical components capable of operating at higher modulation rates. Lumentum's lasers are designed to operate at these speeds, and the transition to faster generations has driven both a product upgrade cycle and volume increases as more AI clusters are deployed.

Lumentum delivered Q2 FY2026 revenue of $665.5 million, representing over 65% year-over-year growth. The company has noted it is powering virtually every AI network, either through direct hyperscaler partnerships or as a critical component supplier, and is currently under-shipping customer demand by approximately 30%.

Marvell Technology designs semiconductors for data center networking, storage, and carrier infrastructure, and has expanded significantly into custom AI silicon. Its product portfolio includes Ethernet controllers, optical DSPs, storage controllers, and custom application-specific integrated circuits designed for specific cloud hyperscalers building their own AI accelerators. Marvell functions as a design and engineering partner to hyperscalers that want chips optimized for their specific AI workloads rather than the general-purpose GPUs available from Nvidia and AMD.

Hyperscaler custom AI silicon programs have been a major revenue driver for Marvell. Building a custom AI chip requires chip design expertise, advanced packaging, high-speed SerDes IP, and manufacturing relationships to bring a complex multi-die system into volume production—capabilities Marvell has invested in. Its custom silicon programs entered volume production during FY2025, with data center revenue growing 78% YoY in Q4 FY2025. The company's electro-optic interconnect products—used in the optical links connecting AI accelerators—are a second significant growth vector within AI.

Marvell delivered record fiscal 2026 revenue of $8.195 billion, growing 42% year-over-year, driven by robust AI demand. Marvell also expanded its portfolio through acquisitions, picking up Celestial AI and XConn Technologies to strengthen its position in AI scale-up networking and silicon photonics.

Micron Technology is one of the world's largest manufacturers of DRAM and NAND flash memory, and one of three companies—alongside SK Hynix and Samsung—capable of producing high-bandwidth memory (HBM). HBM is a stacked DRAM product mounted directly on AI accelerators, providing memory bandwidth orders of magnitude higher than standard DDR memory. Every Nvidia, AMD, and Google AI accelerator deployed in a data center includes HBM, making Micron a direct participant in AI accelerator production.

Micron's HBM business grew from a minor contributor to a primary revenue driver in less than two years. Data center DRAM revenue—conventional DDR used in AI servers for host memory—tripled YoY as AI server deployments expanded the installed base of memory-intensive systems. Gross margins improved from approximately 22% in FY2024 to above 50% in FY2025, reflecting the shift in revenue mix toward higher-value HBM and data center products.

HBM3E supply sold out through 2026, and Micron has begun pricing HBM4 capacity agreements. Q1 FY2026 revenue was $13.64B, up 57% YoY, with continued growth guided for subsequent quarters. Micron's position as one of three HBM manufacturers gives it structural participation in AI accelerator production volumes—every GPU built requires HBM, and the HBM content per GPU grows with each generation as AI models require more memory bandwidth.

Microsoft builds and operates Azure, a hyperscale cloud platform that provides compute (VMs), storage, networking, and AI infrastructure to enterprises and developers. The company has become a major force in AI infrastructure through its deep partnership with OpenAI, integration of GPUs (primarily Nvidia), and development of custom silicon such as Azure Maia (AI accelerator) and Cobalt (ARM-based CPU). Microsoft also embeds AI services across its software stack, from Azure AI to Copilot products, driving demand for its underlying compute platform.

Azure has emerged as one of the top two global cloud platforms, benefiting from enterprise distribution and tight integration with Microsoft’s software ecosystem. The company is investing heavily in data centers and custom silicon to reduce reliance on third-party chips and improve margins. Microsoft is looking to add more than 2GW of capacity in their data centers this year, with large campuses in Wisconsin and Arkansas under construction.

Monolithic Power Systems (MPS) designs high-performance power management integrated circuits used in computing, storage, automotive, and industrial applications. Its products—voltage regulators, battery management ICs, motor drivers—manage how power is converted and delivered within electronic systems. MPS sells into a broad range of end markets, but its exposure to AI computing has become a primary growth driver.

AI GPU servers place unusually demanding requirements on power delivery hardware. A modern AI GPU consumes over 1,000 watts, and a full NVL72 server with 72 such GPUs requires power delivery capable of managing tens of kilowatts with high efficiency and stability. The voltage regulators and power modules inside these servers must operate at high switching frequencies and deliver current at the precise levels required by the GPU without introducing noise or instability. MPS's expertise in high-efficiency, high-current power management has made it a relevant supplier for this application.

MPS was selected as the power management supplier for Nvidia's Blackwell GB200 reference platform—the standard configuration used by hyperscalers and OEMs building AI servers. This places MPS chips in what is currently the most widely deployed AI server architecture globally. MPS has also been developing power management products for next-generation AI architectures requiring even higher current delivery.

Nebius Group is a Netherlands-based technology company operating GPU cloud infrastructure and AI development services. It was spun out of Yandex—Russia's largest internet company—in 2024 following Yandex's restructuring, and relisted on the Nasdaq as an independent AI infrastructure company. Nebius provides large-scale GPU clusters, cloud storage, and AI development tools to enterprises and AI developers building applications, competing in the market for dedicated GPU cloud capacity alongside CoreWeave and Iren.

The market for purpose-built GPU cloud services has grown substantially as AI labs, enterprises, and cloud operators have sought alternatives to general-purpose cloud providers for large-scale AI compute. Nebius competes by offering fully integrated GPU infrastructure—from data center hardware to cloud platform and developer tools—targeting customers who want a simpler deployment experience. The company's European and Middle Eastern presence gives it geographic differentiation, appealing to customers with data sovereignty requirements or regional regulatory constraints.

In September 2025, Microsoft signed a five-year cloud capacity contract with Nebius valued at $17B+, and Meta followed with a $3B five-year contract. The company's total revenue backlog now exceeds $20B. Nebius reported Q2 2025 revenue up 625% YoY and Q3 2025 revenue up 355% YoY to $146M, with growth reflecting newly deployed capacity ramping. The company is targeting $7–9B in annualized revenue by end of 2026.

Nvidia designs GPU accelerators, networking hardware, and AI computing systems. Its Hopper and Blackwell GPU architectures are the dominant platforms for AI model training and inference globally, used by virtually every major AI lab, cloud provider, and enterprise deploying large-scale AI systems. Nvidia sells both discrete GPUs and complete rack-level systems — the NVL72 — and provides CUDA, the software platform that most AI workloads are written for.

Revenue reached $130.5B in FY2025 and $215B in FY2026, with the data center segment driven almost entirely by AI GPU demand. Data center revenue hit $39.1B in Q1 FY2026, up 73% year-over-year, as Blackwell deployments at hyperscalers and cloud providers continued to accelerate.  The Blackwell architecture introduced the GB200 GPU and the NVL72 rack system, integrating 72 Blackwell GPUs into a single liquid-cooled unit with shared memory and high-bandwidth NVLink connections.

AI inference has grown into a revenue driver comparable in scale to training. In December 2025, Nvidia made its largest-ever deal, acquiring assets from AI chip startup Groq for approximately $20 billion in cash. Jensen Huang stated the plan is to integrate Groq's low-latency processors into the Nvidia AI factory architecture. The result is the Groq 3 LPX inference accelerator, which Nvidia claims delivers 35x higher throughput per megawatt for trillion-parameter AI models compared to the Blackwell NVL72. Nvidia continues to invest in inference optimization software including TensorRT and Triton. The company also announced manufacturing of AI supercomputers in the US in partnership with Foxconn and other contract manufacturers, and the Rubin GPU architecture remains on the roadmap for 2026.

NXP Semiconductors designs chips for automotive, industrial, mobile, and IoT applications, with a product portfolio spanning microcontrollers, application processors, RF chips, and power management semiconductors. Its automotive segment is the largest part of its business and the most relevant to AI—NXP chips are used in advanced driver assistance systems (ADAS), vehicle networking, and the compute platforms that run AI-based perception and decision-making software in modern vehicles.

Automotive AI has distinct requirements from data center AI. ADAS systems must process sensor data from cameras, radar, and lidar in real time with strict latency constraints, often without cloud connectivity, and with functional safety requirements mandating high reliability over long operating lifetimes. NXP's S32 processor family addresses these requirements, providing a compute platform for ADAS that runs AI inference models for object detection, lane keeping, and similar applications.

NXP launched the S32 AI processor family in 2025, targeting automotive AI and ADAS with a combination of CPU, neural network accelerator, and functional safety features. NXP also expanded edge AI inference capabilities for industrial IoT applications, where similar constraints around latency, connectivity, and power apply.

Qualcomm designs mobile processors, RF chips, and wireless modems, with the Snapdragon SoC family powering the majority of Android premium smartphones and an increasing share of Windows PCs. Qualcomm is the leading supplier of application processors with integrated NPUs for mobile and PC AI—on-device AI that runs locally without cloud connectivity. In 2025, Qualcomm made its first significant move into data center AI, announcing dedicated accelerator chips targeting inference workloads in hyperscale deployments.

On-device AI has been a central design priority for Qualcomm's recent Snapdragon generations. The Hexagon NPU, integrated into Snapdragon mobile and PC chips, enables applications like real-time voice recognition, image generation, and AI assistant features to run locally. Snapdragon X Elite and the subsequent X2 Elite for AI PCs brought competitive NPU performance to the Windows market. Qualcomm projects over 800M AI-capable chips shipped across smartphone and PC platforms in 2025.

In October 2025, Qualcomm announced the AI200 and AI250 data center accelerators, targeting inference workloads at rack scale. Humain, a Saudi Arabian AI infrastructure company, was announced as the first customer for a 200 MW deployment—Qualcomm's entry into the data center AI market at commercial scale. The AI200 is designed for 2026 production, and the AI250 for 2027. Qualcomm's entry into data center AI reflects the company's assessment that the inference market is addressable given its architecture.

Samsung Electronics is one of the world's largest semiconductor companies, operating a memory business producing DRAM and NAND flash, and a foundry business manufacturing chips for external customers. In AI, Samsung participates as a memory supplier—including HBM for AI accelerators—and as a foundry producing logic chips. Samsung also integrates AI features into its Galaxy smartphone and consumer product lines.

Samsung's HBM business has grown alongside AI accelerator demand, but the company faces challenges relative to market leader SK Hynix. Samsung holds approximately 17% of the global HBM market as of Q2 2025, following delays in qualifying its HBM3E products at Nvidia. The foundry business has grown revenue on AI chip orders from US hyperscalers, and Samsung is investing in advanced packaging capabilities to participate in CoWoS-equivalent AI chip assembly.

Samsung is working to qualify its HBM4 products at Nvidia for the next GPU generation, where recovering market share is a strategic priority.

SanDisk manufactures NAND flash memory used in consumer and enterprise storage products, including solid-state drives for data centers, consumer USB and memory cards, and embedded storage for mobile devices. The company was spun off from Western Digital in 2024 and relisted as an independent public company focused solely on flash storage. SanDisk operates manufacturing facilities jointly with Kioxia in Japan, sharing technology development and production capacity while marketing products independently.

AI training workloads have created a significant demand signal for high-throughput NAND storage. Training large language models requires reading enormous datasets repeatedly across a training run, as well as writing frequent model checkpoints to storage. These access patterns favor high sequential read bandwidth and large storage capacity, where modern QLC NAND excels on a cost-per-gigabyte basis. As the scale of AI training datasets and models has grown, the storage provisioned per GPU cluster has grown alongside it.

SanDisk is launching QLC and ULC (ultra-level cell) NAND products optimized for AI training data pipeline workloads, targeting the sequential read throughput and capacity requirements of large-scale AI infrastructure. As an independent company, SanDisk has more flexibility to focus its product roadmap and go-to-market on the enterprise and hyperscaler segments where AI storage demand is concentrated.

Schneider Electric makes electrical distribution, power management, and automation products for buildings, data centers, and industrial facilities. Its data center products include uninterruptible power supplies, power distribution units, cooling systems, and the software platform that manages and monitors data center infrastructure. Schneider serves both as a hardware supplier and as an integration and services partner for data center operators building new facilities.

AI data centers place significantly more demanding requirements on power and cooling infrastructure than conventional server facilities. At these power levels, the power distribution architecture within a facility must be redesigned—from how power enters the building to how it is conditioned, distributed, and delivered to the rack. Schneider's portfolio covers all of these layers.

Schneider launched next-generation EcoStruxure IT software for AI infrastructure management in 2025, providing real-time monitoring and predictive maintenance for power and cooling systems in AI data centers. The company has been contracted as a power infrastructure partner for major US AI hyperscaler campus buildouts. Order backlog reached record levels, with multi-year visibility driven by hyperscaler commitments to build large-scale AI campuses.

SK Hynix is a South Korean semiconductor company and one of the world's two largest DRAM manufacturers. Its product portfolio includes conventional DRAM, NAND flash, and high-bandwidth memory (HBM)—the stacked DRAM product mounted directly on AI accelerators to provide the extreme memory bandwidth required for large-scale AI computation. SK Hynix has been the leading HBM supplier to Nvidia since the HBM3 generation and has maintained that position through HBM3E and into HBM4.

HBM is the memory architecture that enables modern AI accelerators to perform at their rated speeds. Nvidia's Blackwell B200 GPU is paired with 192 GB of HBM3E, and the bandwidth between GPU and memory is the primary bottleneck determining inference throughput for large language models. SK Hynix holds approximately 62% of the global HBM market as of Q2 2025. All HBM capacity across all three suppliers (SK, Micron, and Samsung) is sold out through 2026.

Annual revenue reached approximately $97T KRW ($65B) in 2025, with annual operating profit approximately $33B. SK Hynix is simultaneously shipping HBM3E for current Blackwell platforms and ramping HBM4 production for next-generation AI accelerators. HBM4 offers roughly double the bandwidth of HBM3E per stack.

SMIC (Semiconductor Manufacturing International Corporation) is China's largest and most advanced semiconductor foundry. It manufactures chips across a range of process nodes for customers in mobile, consumer, industrial, and AI applications. SMIC operates as the domestic Chinese alternative to TSMC and Samsung for customers within China, and its advanced process capabilities define the ceiling of what Chinese AI chip designers can build domestically.

SMIC's most advanced process node, referred to as N+2, is a 7nm-equivalent process developed using deep ultraviolet (DUV) lithography rather than EUV—a constraint imposed by US export controls preventing ASML from shipping EUV machines to Chinese customers. This process has limitations relative to true 7nm EUV-based nodes in yield and density, but it is the most advanced manufacturing technology available to Chinese chip designers. Huawei's Ascend AI accelerator chips, deployed in Chinese AI infrastructure, are produced at SMIC using this process.

Revenue has grown as Chinese AI chip companies have redirected production to domestic fabs following US restrictions on foreign foundry access. SMIC is the sole option for customers requiring advanced logic production within China, making its capacity a strategic resource for the domestic AI hardware ecosystem. The company faces constraints in advancing beyond N+2 without access to EUV equipment, limiting the pace at which it can match leading-edge foreign foundries.

Super Micro Computer (Supermicro) designs and manufactures GPU-optimized servers and storage systems for AI training, inference, and high-performance computing workloads. Unlike Dell or HP, which sell servers across a broad range of use cases, Supermicro has historically focused on high-performance, custom-configurable systems with an emphasis on thermal management and GPU density—characteristics that have made it a natural fit for AI infrastructure.

Supermicro's position in the AI server market is built on speed to market and hardware flexibility. When Nvidia launches a new GPU architecture, Supermicro typically ships compatible server platforms faster than larger OEM competitors, which matters to hyperscalers and AI labs that want to deploy new hardware as quickly as possible. The company also offers a high degree of configurability, allowing customers to specify server layouts, cooling approaches, and component choices that larger vendors may not accommodate.

Supermicro ranked second among OEMs in AI-optimized server revenue in 2025. The company was a primary server supplier for xAI's Colossus AI training cluster and expanded US manufacturing capacity to meet the Blackwell build cycle.

Synopsys makes electronic design automation (EDA) software, semiconductor IP, and—following its 2025 acquisition of Ansys—simulation software for structural, fluid dynamics, and electromagnetic analysis. EDA software is the foundational toolchain for designing any integrated circuit. Synopsys and Cadence are the two dominant EDA vendors globally, each deeply embedded in the workflows of semiconductor companies across the industry.

AI chip design has expanded the demand for EDA tools in two ways. First, the complexity of AI chips—multi-die architectures, chiplet integration, 3D packaging, heterogeneous compute—has increased the scope of what EDA must simulate and verify. Second, hyperscalers building custom AI ASICs have become significant EDA customers, requiring full design engagements for in-house chip programs at scale.

In 2025, Synopsys completed the $35B acquisition of Ansys, the leading provider of engineering simulation software. The combination creates a platform that can model how a chip will perform thermally and electrically when integrated into a server or other product. The company's backlog stands at $8.1B, reflecting multi-year commitments from AI chip design customers with long-cycle programs.

Tokyo Electron (TEL) is Japan's largest and the world's third-largest semiconductor equipment company, supplying etch systems, thermal processing equipment, and coater/developer tools to semiconductor manufacturers globally. Its products are used at major foundries and memory manufacturers across all leading-edge and mature process nodes, making TEL a broadly diversified supplier across the semiconductor manufacturing ecosystem.

AI chip production at TSMC, Samsung, and SK Hynix has driven increased capital equipment spending at the fabs where TEL's tools are deployed. Coater/developer systems, which TEL leads in, are used at multiple steps in the photolithography process—more complex chips with more process layers require more coater/developer steps and more equipment. Etch and thermal processing tools similarly scale with chip complexity and production volume.

A notable differentiator for TEL relative to US equipment peers is its exemption from US export restrictions on sales of advanced semiconductor equipment to Chinese fabs. Lam Research and Applied Materials face restrictions that limit what they can sell to Chinese customers; TEL has not been subject to the same constraints, enabling it to continue selling equipment to Chinese foundries building AI chip capacity. With approximately 47% of revenue sourced from China, this exemption is a significant competitive factor.

Tower Semiconductor is a specialty foundry with manufacturing facilities in Israel, the US, Italy, and Japan, producing chips for analog, RF, power, and silicon photonics applications. Unlike leading-edge foundries competing on transistor density, Tower differentiates on process specialization by offering manufacturing platforms for applications where functional requirements cannot be met by pure digital CMOS processes alone. This includes high-voltage analog circuits, RF transceivers, image sensors, and silicon photonics.

Silicon photonics has become increasingly relevant to AI infrastructure as data center networking has scaled to bandwidth levels where electrical links between racks are no longer sufficient. Silicon photonics-based transceivers—integrating optical components directly on a silicon chip—offer a path to lower-cost, higher-density optical interconnects at 800G and 1.6T speeds. Tower's silicon photonics platform enables these components to be manufactured on a standard wafer production line, and the company has been investing in this process capability to serve AI networking customers.

Tower signed multi-year supply agreements with AI networking customers for silicon photonics-based components in 2025 and is expanding its analog and RF capabilities for AI-adjacent applications in sensing and communications. Tower's specialty positioning—serving applications requiring process capabilities outside the standard digital logic roadmap—gives it a distinct role in the AI hardware supply chain, focused on the photonic and analog components supporting AI networking.

Taiwan Semiconductor Manufacturing Company is the world's leading semiconductor foundry, manufacturing chips for fabless customers including Nvidia, AMD, Apple, Google, and Broadcom on a contract basis. TSMC does not design its own chips; it operates fabs that produce chips designed by others. Its competitive position rests on advanced process node leadership—TSMC is typically the first foundry to achieve volume production at each new process generation.

AI chip demand has become TSMC's primary growth driver. Nvidia's Blackwell GPUs, AMD's Instinct accelerators, Google's TPUs, and custom ASICs from hyperscaler in-house programs all run through TSMC's fabs. AI and high-performance computing workloads accounted for 57% of Q3 2025 revenue. TSMC has responded by expanding both wafer capacity at advanced nodes and its CoWoS advanced packaging capacity—the process bonding HBM memory to GPU dies. CoWoS capacity grew from approximately 35,000 to 80,000 wafers per month during 2025 and remains fully booked.

Annual revenue reached $122.42B in 2025, up 31.6% YoY. TSMC is ramping 2nm production, investing in the High-NA EUV equipment required for sub-2nm nodes, and planning $56B in capital expenditure for 2026. The company is also building new fabs in Arizona, Japan, and Germany to diversify manufacturing geography. TSMC's position as the sole manufacturer capable of producing the most advanced AI chips at volume makes it structurally central to the AI hardware supply chain.

Vertiv makes power and thermal management infrastructure for data centers—the hardware that converts power from the grid to the precise voltages and currents that servers require, and the systems that remove the heat those servers generate. Its products include uninterruptible power supplies, power distribution units, precision cooling systems, and rack infrastructure. Vertiv is the leading pure-play provider of critical data center infrastructure, competing with Schneider Electric and Eaton across most of its product categories.

AI GPU deployments have fundamentally changed the power and cooling requirements of data centers. A conventional server rack might consume 10–15 kW, manageable with standard air cooling; a rack of Nvidia Blackwell NVL72 systems can consume 120 kW or more, requiring liquid cooling systems that circulate coolant through the rack to remove heat that air cannot dissipate at those densities. Vertiv has invested in liquid cooling infrastructure that can handle the thermal loads generated by modern AI GPU deployments.

The company was selected by Nvidia as the reference architecture partner for the GB200 and GB300 NVL72 rack systems—meaning Vertiv's thermal and power specifications are built into the reference design that hyperscalers and OEMs use when deploying Blackwell infrastructure. Liquid cooling revenue more than doubled in 2025. In Q4 2025, the company's backlog reached $15B.